In this paper the authors have attempted to determine the electrical activity associated with oxidation induced stacking faults. It has been demonstrated that elevated temperature oxidation of silicon in both dry and wet environments can generate stacking faults in the surface. By employing a combination of scanning and transmission electron-microscopy in conjunction with measuring the I-V characteristics of diffused p-n junctions in the presence of stacking faults, the nature of the electrical activity of stacking faults has been investigated. Models are proposed to account for the experimental observations.