共 7 条
[1]
A low-jitter 1. 9-V CMOS PLL for UltraSPARC microprocessor applications. Ahn H and Allstot D. IEEE Journal of Solid State Circuits . 2000
[2]
Switched currentcircuitsindigitalCMOStechnologywithlowcharge injectionerrors. GaneshKumar,Balachandran,PhillpE.Allen. IEEE Journalof Solid StateCircuits . 2002
[3]
A new CMOS charge pump for low-voltage high-speed PLL applications. Baki R A and El-Gamal M N. In: Circuits and Systems, 2 0 0 3. ISCAS ’ 0 3 .
[4]
A Novel Charge Pump in PLL. LIN Yijing and SHENG Shimin. Acta Scientiarum Naturalium Universitatis Pekinensis, May . 2002
[5]
CMOS switched-op-amp-based sample-and-hold circuit. Liang Dai and Harjani,R. Solid-State Circuits IEEE Journal of, Jan . 2000
[6]
SiGe BiCMOS 3. 3-V clock and data recovery circuits for 1 0-Gb/s serial transmission systems. Meghelli M,Parker B,Ainspan H,and Soyuer M. IEEE Journal of Solid State Circuits . 2000
[7]
A CMOS frequency synthesizer with an injection-locked frequency divider for a 5-GHz wireless LAN receiver. Rategh H,Samavati H,and Lee T. IEEE J. Solid-State Circuits, May . 2000