共 11 条
[1]
A Design Procedure for All-Digital Phase-Locked Loops Based on a Charge-Pump Phase-Locked-Loop Analogy. Volodymyr Kratyuk. IEEE Transactions on Circuits and Systems . 2007
[2]
Phase noise and jitter in CMOS ring oscillators. A Abidi. IEEE Journal of Solid State Circuits . 2006
[4]
硅微陀螺仪的一种新型闭环驱动方案(英文)[J]. 杨波,苏岩,周百令. Transactions of Nanjing University of Aeronautics & Astronau. 2005(02)
[6]
Time-domain modeling of an RF all-digital pll. Syllaios I L,Staszewski R B,Balsara P T. IEEE Transactions on Circuits and Systems . 2008
[10]
Phase-domain all-digital phase-locked loop. Staszewski R B,Balsara P T. IEEE Trans CircuitsSyst,Exp Briefs . 2005