低功耗CMOS逻辑电路设计综述

[1] A 3. 8 nsCMOS 16× 16-b multiplier using complementarypass-transisitor logic. Yano K. Yamanaka T. Nishida T,et al. IEEE Journal of Solid State Circuits . 1990

[2] Power-supply voltage impact on circuit performance for half and lower submicrometer CMOS LSI. Kakuma M,Kinugawa M. IEEE Transactions on Electron Devices . 1990

[3] Switched - source- impedance CMOS circuit for low standby subthresholdcurrent giga-scale LSI’s. Horiguchi M,Sakata T,Itch K. IEEE Journal of Solid State Circuits . 1993

[4] I-V power sup-ply high-speed digital circuit technology with multi- threshold-voltage CMOS. Mutch S,Douseki T .Matsuya Y,et al. IEEE Journal of Solid State Circuits . 1995

[1] A 3. 8 nsCMOS 16× 16-b multiplier using complementarypass-transisitor logic. Yano K. Yamanaka T. Nishida T,et al. IEEE Journal of Solid State Circuits . 1990

[2] Power-supply voltage impact on circuit performance for half and lower submicrometer CMOS LSI. Kakuma M,Kinugawa M. IEEE Transactions on Electron Devices . 1990

[3] Switched - source- impedance CMOS circuit for low standby subthresholdcurrent giga-scale LSI’s. Horiguchi M,Sakata T,Itch K. IEEE Journal of Solid State Circuits . 1993

[4] I-V power sup-ply high-speed digital circuit technology with multi- threshold-voltage CMOS. Mutch S,Douseki T .Matsuya Y,et al. IEEE Journal of Solid State Circuits . 1995