采用实时校正技术的时间数字化测量方法

The use of Stabilized CMOS Delay Lines for the digitization of short Time Inter-vals. Rahkonen T,et al. IEEE Journal of Solid State Circuits . 1993

An Integrated CMOS 0. 15 ns Digital Timing Generator for TDC’ s and Clock Distribution Systems. Christiansen J,et al. IEEE Transactions on Nuclear Science . 1995

The use of Stabilized CMOS Delay Lines for the digitization of short Time Inter-vals. Rahkonen T,et al. IEEE Journal of Solid State Circuits . 1993

An Integrated CMOS 0. 15 ns Digital Timing Generator for TDC’ s and Clock Distribution Systems. Christiansen J,et al. IEEE Transactions on Nuclear Science . 1995