A New Design Method for Variable Digital Filter Based on Field Programmable Gate Array(FPGA)

被引：2

作者：

胡文静 ^{[1
]}

仇润鹤 ^{[2
]}

李外云 ^{[3
]}

机构：

[1] School of Information and Communication Engineering,Hunan Institute of Science&Technology

[2] College of Information Science and Technology,Donghua University

[3] School of Information Science and Technology,East China Normal University

来源：

JournalofDonghuaUniversity(EnglishEdition) | 2012年 / 29卷 / 02期

关键词：

variable digital filter(VDF); field programmable gate array(FPGA); embedded micro-processor(EMP);

D O I：

10.19884/j.1672-5220.2012.02.019

中图分类号：

TN713 [滤波技术、滤波器];

学科分类号：

080902 ;

摘要：

In order to obtain variable characteristics,the digital filter’s type,number of taps and coefficients should be changed constantly such that the desired frequency-domain characteristics can be obtained.This paper proposes a method for self-programmable variable digital filter(VDF) design based on field programmable gate array(FPGA).We implement a digital filter system by using custom embedded micro-processor,programmable finite impulse response(P-FIR) macro module,coefficient-loader,clock manager and analog/digital(A/D) or digital/analog(D/A) controller and other modules.The self-programmable VDF can provide the best solution for realization of digital filter algorithms,which are the low-pass,high-pass,band-pass and band-stop filter algorithms with variable frequency domain characteristics.The design examples with minimum 1 to maximum 32 taps FIR filter,based on Modelsim post-routed simulation and onboard running on XUPV5-LX110T,are provided to demonstrate the effectiveness of the proposed method.

引用

页码：193 / 196

页数：4

共 10 条

[1]

MicroBlaze Processor Reference Guide V12.1. Xilinx Inc. http://china.xilinx.com/support/documentation/swmanuals/xilinx121/mbrefguide.pdf . 2010

[2]

FIR Filter Design Based on FPGA. Jiang X Y,Bao Y J. 2010International Conference on Computer Application and System Modeling . 2010

[3]

A Realization of Digital Filter Banks for Reconstruction of Uniformly Sampled Signals from Nonuniform Samples. Itami F,Watanabe E,Nishibara A. IEEE Asia Pacific Conference on Circuits and Systems . 2008

[4]

On the Design and Implementation of FIR and IIR Digital Filters with Variable Frequency Characteristics. Pun C K S,Chan S C,Yeung K S,et al. IEEE Transactions on Circuits and Systems II:Analog and Digital Signal Processing . 2002

[5]

Design of variable two-dimensional FIR digital filters by McClellan transformation. SHYU J J,PEI S C,HUANG Y D. IEEE Transactions on Circuits and Systems Part I:Regular Papers . 2009

[6]

New reconfigurable architecturesfor implementing FIR filters with low complexity. Mahesh R,Vinod A P. Computer-Aided Design of Integrated Circuits and Sys-tems,IEEE Transactions on . 2010

[7]

Design Flow for Hard-ware Implementation of Digital Filters. Yousefi R,Ahmadi A,Fakhraie S.M. Proceeding of 2008International Symposium on Telecommunications . 2008

[8]

"A Partial Self-Reconfigurable Adaptive FIR Filter System". Choi, Chang-Seok,Lee, Hanho. Signal Processing Systems,2007 IEEE Workshop on Digital Object . 2007

[9]

Variable DigitalFilter With Least-Square Criterion and Peak Gain Constrains. Hai Huyen Dam,Antonio Cantoni,Kok Lay Teo. IEEE Trans on Circuit and System . 2007

[10]

ISE Software Manuals. Xilinx Inc. http://www.xilinx.com/support/documentation/dt_is e12-1.htm . 2010

← 1 →