多片ADC并行采集系统的误差时域测量与校正

[1] An FFT-based method to evaluate and compensate gain and offset errors of interleaved ADC systems. Pereira,JM D,G irao,P M B S,Serra,A M C. IEEE Transactions on Instrumentation andMeasurement . 2004

[2] Time interleaved converter arrays. W C B lack Jr,D A Hodges. IEEE Journal of Solid State Circuits . 1980

[3] B lind adaptive equalization ofm ismatch errors in a time- interleaved A /D converter system. J E lbornsson,F Gustafsson,J-E Eklund. IEEE Transactions on C ircuits and Systems I: Regular Papers, Jan . 2004

[4] A digital-background calibration technique form inim izing tim ing-error effects in time- interleaved ADCs. Jin Huawen,E K F Lee. IEEE Transactions on C ircuits and Systems II: Analog and D igital Signal Processing, July . 2000

[5] On the design and efficient implementation of the Farrow structure. Pun,C K S,Wu,Y C,Chan,S C,et al. IEEE Signal Processing Letters . 2003

[6] Explicit analysis of channel m ismatch effects in time - interleaved ADC systems. N Kurosawa,et al. IEEE Transactions on C ircuits and Systems I: Fundamental Theory and Applications, March . 2001

[7] Calibration of sample- time error in a two- channel time - interleaved analog- to-digital converter. S M Jamal,Fu Daihong,M P Singh,et al. IEEE Transactions on C ircuits and Systems I: Regular Papers, Jan . 2004

[1] An FFT-based method to evaluate and compensate gain and offset errors of interleaved ADC systems. Pereira,JM D,G irao,P M B S,Serra,A M C. IEEE Transactions on Instrumentation andMeasurement . 2004

[2] Time interleaved converter arrays. W C B lack Jr,D A Hodges. IEEE Journal of Solid State Circuits . 1980

[3] B lind adaptive equalization ofm ismatch errors in a time- interleaved A /D converter system. J E lbornsson,F Gustafsson,J-E Eklund. IEEE Transactions on C ircuits and Systems I: Regular Papers, Jan . 2004

[4] A digital-background calibration technique form inim izing tim ing-error effects in time- interleaved ADCs. Jin Huawen,E K F Lee. IEEE Transactions on C ircuits and Systems II: Analog and D igital Signal Processing, July . 2000

[5] On the design and efficient implementation of the Farrow structure. Pun,C K S,Wu,Y C,Chan,S C,et al. IEEE Signal Processing Letters . 2003

[6] Explicit analysis of channel m ismatch effects in time - interleaved ADC systems. N Kurosawa,et al. IEEE Transactions on C ircuits and Systems I: Fundamental Theory and Applications, March . 2001

[7] Calibration of sample- time error in a two- channel time - interleaved analog- to-digital converter. S M Jamal,Fu Daihong,M P Singh,et al. IEEE Transactions on C ircuits and Systems I: Regular Papers, Jan . 2004