共 10 条
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The impact of combined channel mismatch effects in time-interleaved ADCs. Vogel C. IEEE Transactions on Instrumentation and Measurement . 2005
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Analysis of mismatcheffects among A/Dconverters in atime-interleaved waveformdigitizer. S K Mitra,APetraglia. IEEE Transactions on Instrumentation and Measurement . 1991
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An Analog Background Calibration Technique for Time-Interleaved Analog-to-Digital Converters. Dyer K C,Fu D H,Lewis S H. IEEE Journal of Solid State Circuits . 1998
[4]
A Digital Background Calibration Technique for Ti me-Interleaved Analog-to-Digital Converters. Fu Daihong,Dyer Kenneth C,Lewis Stephen H,and Hurst Paul J. IEEE Journal of Solid State Circuits . 1998
[5]
A 10-bit 120-Msample/s time-interleaved analog-to-digital converter withdigital background calibration. Jamal S M,Daihong Fu,Chang N C J, et al. IEEE Journal of Solid State Circuits . 2002
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A20GS/s8b ADC with a1MB memory in0.18μm CMOS. POULTON K,,NEFF R,SETTERBERG B,et al. Proc.IEEE Int.Solid-State Circuits Conf . 2003
[7]
Time-interleaved oversampling A/D converters:theory and practice. KHOINI-POORFARD R,LIM L.B,,JOHNS D A. IEEE trans.Circuits syst.II . 1997
[8]
A4GSample/s8b ADC in0.35μm CMOS. POULTON K,NEFF R,MUTO A,et al. Int.Solid-State Circuits Conf.Tech.Dig . 2002
[9]
Digital offset compensa-tion of time-interleaved ADC using random chopper sam-pling. EKLUND J.E,,GUSTAFSSON F. Proc.IEEE Int.Symp.Circuits syst.ISCAS . 2000
[10]
Time-interleaved oversampling converters. Poorfard,R.K.,Johns,D.A. Electronics Letters . 1993