Gate induced leakage and drain current offset in organic thin film transistors

Gate bias induced leakage current and drain current offset limit device performance in poly 3-hexylthiophene (P3HT) organic thin film transistors (OTFTs). The drain current offset distorts the drain current in the linear region of the transistor performance curve, making it difficult to extract device parameters. A higher drain current offset corresponds to higher leakage current, which contributes to poor drain current modulation. The drain current offset increases when the semiconductor doping density is higher or when the P3HT film is thicker. We propose that the most probable mechanism for the leakage and drain current offset is uncontrolled expansion of drain/source electrodes. Based on the proposed mechanisms, the drain current offset is dramatically reduced by patterning the active region to reduce non-channel leakage. (C) 2005 Elsevier B.V. All rights reserved.