A completely integrated 1.9-GHz receiver front-end with monolithic image-reject filter and VCO

被引:6
作者
Rogers, JWM [1 ]
Macedo, JA
Plett, C
机构
[1] SiGe Microsyst, Ottawa, ON K2B 8J9, Canada
[2] Res Motion, Ottawa, ON K2H 5Z6, Canada
[3] Carleton Univ, Dept Elect, Ottawa, ON K1S 5B6, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
inductors; integrated circuit design; MMIC receivers; notch filters; voltage-controlled oscillator;
D O I
10.1109/22.981268
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 1.9-GHz monolithic superheterodyne receiver front-end with 300-MHz IF on-chip tunable image-reject filter and voltage-controlled oscillator (VCO) is presented. Two versions of the receiver were fabricated on a 0.5-mum bipolar process and compared to a previously fabricated version with an off-chip VCO. The two versions are identical, except for the fact that the 2.2-GHz VCO was realized with and without ground-shielded inductors. The receiver that used ground-shielded inductors had a conversion gain of 25.6 dB, a noise figure of 4.5 dB, a third-order input intercept point (IIP3) of - 19 dBm, an image rejection of 65 dB, and a phase noise of - 103 dBc/Hz at 100-kHz offset. The receiver drew 32.5 mA from a 3-V supply and had a die area of 2.1 mm X 1.7 mm. The local-oscillator-IF isolation improved compared to the previously fabricated front-end with an off-chip VCO.
引用
收藏
页码:210 / 215
页数:6
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