Simulation of yield/cost learning curves with Y4

被引:9
作者
Nag, PK [1 ]
Maly, W [1 ]
Jacobs, HJ [1 ]
机构
[1] SIEMENS AG,DEPT ZFE T ME 1,CORP RES & DEV,D-81730 MUNICH,GERMANY
关键词
D O I
10.1109/66.572080
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This paper describes a prototype of a discrete event simulator-Y4 (yield Forecaster)-capable of simulating defect related yield loss and manufacturing cost as a function of time, for a multiproduct IC manufacturing line, The methodology of estimating yield and cost is based on mimicking the operation and characteristics of a manufacturing line in the time domain, The paper presents a set of models that take into account the effect of particles introduced during wafer processing as well as changes in their densities due to process improvements, These models also illustrate a possible way of accounting for the primary attributes of fabrication, product, and failure analysis which affect yield learning, A spectrum of results are presented for a manufacturing scenario to demonstrate the usefulness of the simulator in formulating IC manufacturing strategies.
引用
收藏
页码:256 / 266
页数:11
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