MPEG-4 video and image coding on digital signal processors

被引:5
作者
Budagavi, M [1 ]
Webb, J [1 ]
Zhou, MH [1 ]
Liang, J [1 ]
Talluri, R [1 ]
机构
[1] Texas Instruments Inc, DSP Solut R&D Ctr, Dallas, TX 75243 USA
来源
JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY | 1999年 / 23卷 / 01期
关键词
D O I
10.1023/A:1008140703000
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The emerging MPEG-4 standard encompasses a wide variety of applications, many of which are suitable for implementation on a Digital Signal Processor (DSP). In particular, consumer products with embedded multimedia capability, such as set-top boxes and wireless communicators, are suitable for DSP-based implementation. With a programmable approach, various algorithmic tradeoffs can be made, based on processing capability. For best performance, careful attention must be paid to memory allocation, data transfer, and ordering of instructions to best match the DSP architecture. We discuss implementing simple profile MPEG-4 video on the low-power TMS320C54x, core profile on the TMS320C6x, and scalable texture profile, which could be implemented on either processor family.
引用
收藏
页码:51 / 66
页数:16
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