Associative processors for video coding applications

被引:8
作者
Balam, S [1 ]
Schonfeld, D
机构
[1] Qualcomm Inc, San Diego, CA 92122 USA
[2] Univ Illinois, Dept Elect & Comp Engn, Chicago, IL 60607 USA
关键词
associative processors; content-addressable memory (CAM); discrete cosine transform (DCT); video;
D O I
10.1109/TCSVT.2005.858696
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Associative processors are single-instruction multiple-data-based architectures that provide huge parallelism which can be very useful for processing video in real time. This paper describes architectural requirements for video and shows that associative processors are ideally suited for applications involving video. Some routines like discrete cosine transforms (DCTs) lack required parallelism and their implementation becomes critical for the overall performance of the processor for video. We present three different approaches for computing two-dimensional DCT on associative processors and discuss their implementation details. Many methods like conditional execution of DCT, have been suggested in literature for power efficiency. In this paper, we discuss integration of these techniques in our implementation. Finally, performance of Associative processors is compared with that of RISC and DSP processor and show that associative processors are better suited for processing video both in terms of speed and power.
引用
收藏
页码:241 / 250
页数:10
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