Performance analysis using pipeline visualization

被引：5

作者：

Weaver, C ^{[1
]}

Barr, KC ^{[1
]}

Marsman, E ^{[1
]}

Ernst, D ^{[1
]}

Austin, T ^{[1
]}

机构：

[1] Univ Michigan, Adv Comp Architecture Lab, Ann Arbor, MI 48104 USA

来源：

ISPASS: 2001 IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE | 2001年

关键词：

D O I：

10.1109/ISPASS.2001.990670

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

High-end microprocessors are increasing in complexity to push the limits of speed and performance. As a result, analyzing these complex systems can be an arduous task. Architectural simulators, acting as software processors, are able to run programs and give statistics about the performance of the code on the design. While these statistics are valuable for identifying problems, they often do not provide the fidelity necessary to diagnose the cause of sluggish performance. This paper presents a cross-platform tool that can be used to visualize the flow of instructions through an architectural processor pipeline model. The Graphical Pipeline Viewer GPV, uses a colorized pipeline trace display to deliver an efficient diagnostic and analysis environment. The resource view of the tool, which can display cycle statistics, aids in distinguishing possible bottlenecks and architectural trade-offs. As such, the tool is able to suggest code and architectural modifications to increase program performance. (1 2).

引用

页码：18 / 21

页数：4

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