Two-bounce free-space arbitrary interconnection architecture

被引：3

作者：

Christensen, MP

Haney, MW

机构：

来源：

PROCEEDINGS OF THE FOURTH INTERNATIONAL CONFERENCE - MASSIVELY PARALLEL PROCESSING USING OPTICAL INTERCONNECTIONS | 1997年

关键词：

D O I：

10.1109/MPPOI.1997.609099

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

The two bounce free-space arbitrary interconnection architecture is introduced. It is requires 3 stages of local electronic routing and 2 passes, or bounces, through a common retro-reflective optical system. The concept combines the global optical interconnection with the nonblocking multistage interconnection the Benes network, to achieve arbitrary interconnections across a multichip backplane. The arbitrary interconnection requires only one additional pass through the optical system. The architecture is experimentally validated with a optical module and a fiber coupled LED and detector array to simulate the smart pixel I/O placement in the backplane of the module. The architecture is further evaluated using VCSEL arrays and a CCD camera for resolution and registration measurements.

引用

页码：61 / 67

页数：7