Multilayered seed for electrochemical deposition (ECD) of Cu was investigated to develop narrow-pitched, dual-damascene Cu interconnects that will be required for future ULSI devices. The seed was obtained by the physical vapor deposition (PVD) of a Cu film followed by the chemical vapor deposition (CVD) of a Cu film. The seed of the thinner CVD-Cu element and the thicker PVD-Cu element demonstrated better filling characteristics in high-aspect ratio vias. Good current-voltage characteristics were demonstrated using the multilayered seed technique with Cu dual-damascene interconnects (0.28 mum minimum via size) resulting in a via resistance about 0.7 Omega. In addition, ring-oscillator circuits were fabricated by integrating the double-layered interconnects with a transistor having a 0.18 mum gate width. The propagation delay per inverter, which had an interconnect with 10(4) vias, was about 6 ns. We successfully fabricated multilevel Cu-damascene interconnects, which are available for future high-speed devices using this multilayered seed technique.