A survey on application mapping strategies for Network-on-Chip design

被引：261

作者：

Sahu, Pradip Kumar ^{[1
]}

Chattopadhyay, Santanu ^{[1
]}

机构：

[1] Indian Inst Technol, Dept Elect & Elect Commun Engn, Kharagpur 721302, W Bengal, India

来源：

JOURNAL OF SYSTEMS ARCHITECTURE | 2013年 / 59卷 / 01期

关键词：

Application mapping; Network-on-chip; System-on-chip; Intellectual property; ENERGY-AWARE; COMMUNICATION; ALGORITHM; BANDWIDTH; CORES; ARCHITECTURES; OPTIMIZATION;

D O I：

10.1016/j.sysarc.2012.10.004

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Application mapping is one of the most important dimensions in Network-on-Chip (NoC) research. It maps the cores of the application to the routers of the NoC topology, affecting the overall performance and power requirement of the system. This paper presents a detailed survey of the work done in last one decade in the domain of application mapping. Apart from classifying the reported techniques, it also performs a quantitative comparison among them. Comparison has been carried out for larger sized test applications also, by implementing some of the prospective techniques. (c) 2012 Elsevier B.V. All rights reserved.

引用

页码：60 / 76

页数：17