Study of Cu contamination during copper integration for subquarter micron technology

被引:16
作者
Motte, P
Torres, J
Palleau, J
Tardif, F
Bernard, H
机构
[1] SGS Thomson Microelect, F-38926 Crolles, France
[2] France Telecom, Ctr Natl Etud Telecommun, F-38243 Meylan, France
[3] CEA, LETI, F-38054 Grenoble, France
关键词
D O I
10.1016/S0038-1101(99)00017-9
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Copper contamination in several dielectric deposited on copper-CVD film was investigated, This study aims at integrating copper in a dual damascene structure interconnection for sub-quarter micron technology. A complete contamination profile into the deposited dielectric was available using SIMS, TXRF (total X-ray reflection fluorescence) and LPD-AAS (liquid phase decomposition-atomic absorption spectroscopy) as complementary characterization tools. The Cu contamination profile of the SiN/SiO2 and SiO2? structure deposited on copper was given. The PECVD process used for both process cleaning of the chamber and SiOF deposition imply plasma with fluorine and the reactivity of this species with copper was shown to be critical for dielectric contamination and copper contact surface. Eventually, a cleaning solution was investigated to lower the contamination at the surface of the dielectric, the most contaminated parr. (C) 1999 Elsevier Science Ltd, All rights reserved.
引用
收藏
页码:1015 / 1018
页数:4
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