The effect of polysilicon grain boundaries on MOS based devices

被引:17
作者
Eccleston, W [1 ]
机构
[1] Univ Liverpool, Dept Elect Engn & Elect, Liverpool L69 3BX, Merseyside, England
关键词
D O I
10.1016/S0167-9317(99)00348-2
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Analysis is provided of the now of current through undoped polysilicon. Charge is assumed to be trapped in grain boundaries giving potential barriers across which the free electrons and holes pass. Barriers height depends on gate and drain voltage, as does charge in the grain. At low current the electrostatic effect of the free charge is much less than trapped. There is, therefore, no gradual channel and nux of charge is controlled bq the differences in concentration in adjacent grains(quasi-diffusion) as in the subtreshold region of MOSFETs. When the number of free carriers becomes comparable with that on the gate, there is an ohmic change in potential, and the channel current is drift limited (quasi-drift) by analogy with the gradual channel condition in MOSFETs. Variation field effect current with gate and drain voltages is compared with measurements at various temperatures.
引用
收藏
页码:105 / 108
页数:4
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