Issues in high-κ gate stack interfaces

We address current challenges in the fundamental understanding of physical and chemical processes that occur in the fabrication of the transistor gate stack structure. Critical areas include (1) the interface between bulk silicon and high-dielectric-constant (high-kappa) insulators, (2) the interface between high-kappa insulators and advanced gate electrodes, and (3) the internal interfaces that form within dielectric stacks with nonuniform material and structure compositions. We approach this topic from a fundamental understanding of bonding and electronic structure at the interfaces, and of film-growth kinetics in comparison with thermodynamics predictions. Implications for the dielectric/electrode interface with metallic gates and issues with integration will also be presented.