MOS devices with high quality ultra thin CVD ZrO2 Gate dielectrics and self-aligned TaN and TaN/poly-Si gate electrodes

被引:22
作者
Lee, CH [1 ]
Kim, YH [1 ]
Luan, HF [1 ]
Lee, SJ [1 ]
Jeon, TS [1 ]
Bai, WP [1 ]
Kwong, DL [1 ]
机构
[1] Univ Texas, Microelect Res Ctr, Dept Elect & Comp Engn, Austin, TX 78758 USA
来源
2001 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2001年
关键词
D O I
10.1109/VLSIT.2001.934987
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this paper, we have successfully fabricated and characterized self-aligned TaN and TaN/poly-Si gated n-MOSFETs with ultra thin (EOT= 11 Angstrom) CVD ZrO2 gate dielectrics. It is show that while both gate stacks show excellent leakage current and Rood thermal stability after a 900degreesC, 30sec, N-2 anneal, the TaN/poly-Si ZrO2 devices exhibit superior thermal stability even after 1000degreesC 30sec N-2 anneal. In addition, the TaN/Poly-Si devices show negligible frequency dependence of CV, charge trapping, and superior TDDB characteristics, compared to TaN devices. Well-behaved N-MOSFETs with both TaN and TaN/Poly-Si gate electrodes are demonstrated..
引用
收藏
页码:137 / 138
页数:2
相关论文
共 3 条
[1]  
Lee CK, 2000, IEEE POWER ELECTRON, P27, DOI 10.1109/PESC.2000.878794
[2]   High quality ultra thin CVD HfO2 gate stack with poly-Si gate electrode [J].
Lee, SJ ;
Luan, HF ;
Bai, WP ;
Lee, CH ;
Jeon, TS ;
Senzaki, Y ;
Roberts, D ;
Kwong, DL .
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :31-34
[3]  
QI W, VLSI TECH 2000, P40