Design considerations for low-voltage on-board DC/DC modules for next generations of data processing circuits

被引：114

作者：

Zhang, MT ^{[1
]}

Jovanovic, MM ^{[1
]}

Lee, FC ^{[1
]}

机构：

[1] DELTA POWER ELECTR LAB INC,BLACKSBURG,VA 24060

来源：

IEEE TRANSACTIONS ON POWER ELECTRONICS | 1996年 / 11卷 / 02期

关键词：

D O I：

10.1109/63.486183

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

By reducing the power supply voltage, a higher speed, lower power consumption, and higher integration density of data processing IC's can be achieved, Presently, a variety of IC's operating from 3.3 V are available, Next generations of IC's are expected to work even with lower voltages, i.e., in the 1-3 V range, to further enhance their speed-power performance, At the same time, during transients these new generations of data IC's will present very dynamic loads with high current slew rates, As a result, they will require point-of-load power supplies in order to minimize the effects of the interconnection parasitics, These onboard power supplies will be derived from the existing voltages available in the system (usually 5 or 12 V), and will be required to have high power densities, high efficiencies, and good transient performance, This paper presents design considerations for these on-board power supplies and discusses their performance limits imposed by various circuit and system parasitics.

引用

页码：328 / 337

页数：10