A multi-processor computer architecture for active control

被引：16

作者：

Darbyshire, EP

Kerry, CJ

机构：

来源：

CONTROL ENGINEERING PRACTICE | 1997年 / 5卷 / 10期

关键词：

digital signal processors; active control; real-time systems; noise control; parallel processing;

D O I：

10.1016/S0967-0661(97)00140-8

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 [计算机科学与技术];

摘要：

An integrated real-time computer, suitable for active control and digital signal processing applications is presented. The key features are the low-latency high-performance architecture (25 GFLOPS), integrated multi-channel analogue-to-digital interfaces and ease of programming in a MATLAB(R)(1) environment. The system has been developed for an active control application, which is discussed along with details of the hardware and software design and future application areas. Copyright (C) 1997 Elsevier Science Ltd.

引用

页码：1429 / 1434

页数：6