Submicron P-channel (Al,Ga)As/(In,Ga)As HIGFET's

被引:2
作者
Abrokwah, JK [1 ]
Lucero, R [1 ]
Hallmark, JA [1 ]
Bernhardt, B [1 ]
机构
[1] MOTOROLA CPL,TEMPE,AZ 85284
关键词
D O I
10.1109/16.595929
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Submicron p-channel (Al,Ga)As/(In,Ga)As HIGFET's have been optimized for application to high-performance complementary GaAs circuits. Major issues with submicron and deep submicron (L-g less than or equal to 0.5-mu m) P-channel HIGFET's have been the severe short-channel effects, such as high subthreshold leakage currents and high output conductances. With optimization of the p-type self-aligned implant schedule, control of impurity contamination at the substrate/buffer interfaces and increase of the resistivity of the unintentionally-doped GaAs buffers, high-performance submicron devices have been realized. Typically, 0.5-mu m P-HIGFET's yielded room temperature transconductances of 90 mS/mm, drain currents at V-gs = V-ds = -1.5 V of 63 mA/mm, and subthreshold leakage currents near 1 nA. Subthreshold slope of 90 mV/decade and output conductances under 5 mS/mm were realized.
引用
收藏
页码:1040 / 1045
页数:6
相关论文
共 7 条
[1]  
ABROKWAH J, 1993 GAAS IC S, P127
[2]  
ANHOLT R, COMMUNICATION
[3]  
BERNHARDT B, 1995 GAAS IC S, P18
[4]  
GRIDER DE, 1992 IEDM, P331
[5]  
HALLMARK J, 1994 IEEE GAAS IC S, P55
[6]  
SHURBOFF C, UNPUB MOTOROLA INT R
[7]  
SMITH F, 1992, MATER RES SOC S P, V1, P241