Gated-four-probe a-Si:H TFT structure: A new technique to measure the intrinsic performance of a-Si:H TFT

被引：37

作者：

Chen, CY

Kanicki, J

机构：

[1] Dept. of Elec. Eng. and Comp. Sci., Ctr. for Display Technol. and Mfg., University of Michigan, Ann Arbor

来源：

IEEE ELECTRON DEVICE LETTERS | 1997年 / 18卷 / 07期

关键词：

D O I：

10.1109/55.596930

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this letter, a new technique based on gated-four-probe hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT) structure is proposed. This new technique allows the determination of the intrinsic performance of a-Si:H TFT without any influence from source/drain series resistances, In this method, two probes within a conventional a-Si:H TFT are used to measure the voltage difference within a channel. By correlating this voltage difference with the drain-source current induced by applied gate bias, the a-Si:H TFT intrinsic performance, such as mobility, threshold voltage, and field-effect conductance activation energy, can be accurately determined without any influence from source/drain series RESISTANCES.

引用

页码：340 / 342

页数：3

共 6 条

[1] High field-effect-mobility a-Si:H TFT based on high deposition-rate PECVD materials [J].