A design of a 10-W single-chip class D audio amplifier with very high efficiency using CMOS technology

被引：11

作者：

Choi, SC ^{[1
]}

Lee, JW ^{[1
]}

Jin, WK ^{[1
]}

So, JH ^{[1
]}

Kim, S ^{[1
]}

机构：

[1] Korea Univ, Dept Elect Engn, Sungbuk Ku, Seoul 136701, South Korea

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1999年 / 45卷 / 03期

关键词：

class D; power amplifier; audio; efficiency; dead-time;

D O I：

10.1109/30.793526

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A one-chip integrated circuit (IC) of a 10-W class-D audio power amplifier with very high efficiency using CMOS technology is presented in this paper. A mixture of a class D output stage and a bridge tied load (BTL) is the main topology of the proposed amplifier. The new 10-W IC audio power amplifier operates at 12 V with the efficiency of more than 90% and the total harmonic distortion (THD) of 0.1%. The amplifier is implemented in a 4-mu m double-metal, single-poly CMOS technology that provides with relatively high voltage (12V) technology MOSFETs.

引用

页码：465 / 473

页数：9