A high resolution multihit time to digital converter integrated circuit

We describe a test chip for a pipelined, multihit time to digital converter, capable of operating in common stop mode, with double hit resolution of approximately 10 nanoseconds, maximum time range of 10 microseconds and least count of 50 picoseconds. This is constructed with a standard CMOS process using a novel application of the Vernier principle. The test chip demonstrates this application. This device has many potential applications in high energy and nuclear physics experiments, as well as other fields of research. We present results of measurements made on this test chip.