10-15 nm ultrashallow junction formation by flash-lamp annealing

被引:63
作者
Ito, T
Iinuma, T
Murakoshi, A
Akutsu, H
Suguro, K
Arikado, T
Okumura, K
Yoshioka, M
Owada, T
Imaoka, Y
Murayama, H
Kusuda, T
机构
[1] Toshiba Co Ltd, Semicond Co, Proc & Mfg Engn Ctr, Isogo Ku, Yokohama, Kanagawa 2358522, Japan
[2] Ushio Inc, Lamp Technol & Engn Div, Himeji, Hyogo 6710224, Japan
[3] Dainippon Screen Mfg Co Ltd, Dev Dept Elect Equipment, Fushimi Ku, Kyoto 6128486, Japan
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | 2002年 / 41卷 / 4B期
关键词
flash-lamp annealing; ultrashallow junction; retrograde channel; super-saturation; activation; As; B; In; MOSFETs;
D O I
10.1143/JJAP.41.2394
中图分类号
O59 [应用物理学];
学科分类号
摘要
Flash-lamp annealing (FLA) technology, a new method of activating implanted impurities, is proposed, FLA is able to reduce the time of the heating cycle to within the millisecond range. With this technology, an abrupt profile is realized, with a dopant concentration that can exceed the maximum carrier concentration obtained by conventional rapid thermal annealing (RTA) or furnace annealing. In contrast to a laser annealing method, FLA can activate dopants in an 8-inch-diameter substrate and, simultaneously, strictly control diffusion of dopants so as not to melt the substrate surface by radiation. FLA presents the possibility of fabricating sub-0.1-mum MOSFETs with good characteristics.
引用
收藏
页码:2394 / 2398
页数:5
相关论文
共 3 条
[1]  
Goto K., 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318), P931, DOI 10.1109/IEDM.1999.824302
[2]  
PARK CM, 2000, 2000 INT C SOL STAT, P404
[3]  
YU B, 1999, INT EL DEV M, P509