We present performance measurements of a ''Winner-Take-All'' (WTA) CMOS integrated circuit to be used with a pixel based PET detector module. Given n input voltages, it rapidly determines the input with the largest voltage, and outputs the encoded address of this input and a voltage proportional to this largest voltage. This is more desirable than a threshold approach for applications that require exactly one channel to be identified or when noise is a significant fraction of the input signal. A sixteen input prototype has been fabricated using two 1.2 mu m processes (HP linear MOS capacitance and Orbit double-poly capacitance). ICs from both processes reliably identify (within 50 ns) the maximum channel if Delta V (the difference between the two highest channels) is >20 mV. The key element in the WTA circuit is an array of high gain non-linear current amplifiers. There is one amplifier for each input channel, and each amplifier is composed of only two FETs. All amplifiers are supplied by a common, limited current source, so the channel with the largest input current takes all of this supply current while the other channels receive virtually none. Thus; these amplifier outputs become a set of logical bits that identify the maximum channel, which is encoded and used to select a multiplexer input. A voltage to current converter at each input channel turns this into a voltage sensitive device. This circuit uses very little power, drawing approximately 100 mu A at 5 V.