A control and readout system for the BELLE silicon vertex detector

被引:13
作者
Tanaka, M
Hazumi, M
Ryuko, J
Sumisawa, K
Marlow, D
机构
[1] High Energy Accelerator Res Org, Tsukuba, Ibaraki 305, Japan
[2] Osaka Univ, Grad Sch Sci, Toyonaka, Osaka 560, Japan
[3] Princeton Univ, Joseph Henry Labs, Princeton, NJ 08544 USA
关键词
D O I
10.1016/S0168-9002(99)00504-5
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
A newly developed system for the control and readout of the BELLE silicon vertex detector (SVD) is described. The system is designed to meet the mechanical, electrical, and thermal requirements imposed by the BELLE detector. Its primary purpose is the amplification of analog signals from the VA1 front-end integrated circuits, which are used to read the silicon-strip detectors. It also provides a number of analog and digital functions related to the control and monitoring of the SVD. Much of the circuitry is implemented using programmable logic and analog devices, which allow a degree a flexibility in the design. In total, eight crates will be installed to read out the 81 920 strips from the three-layer double-sided silicon-strip detector array. (C) 1999 Elsevier Science B.V. All rights reserved.
引用
收藏
页码:422 / 431
页数:10
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