Sub-micron high aspect ratio silicon beam etch

High aspect ratio beam/trench arrays are etched into single crystal silicon substrates (100 orientation) using a Surface Technology Systems (STS) deep reactive ion etch (RIE) tool. Process input parameters are varied using high/low values for etch cycle time, passivation cycle time, RF coil power, and SF6 flow rate. The silicon etch process is characterized using photo-resist masked trench arrays varied from 1.5mum through 6mum in both width and spacing. A design of experiments (DOE) approach is used to model the following measured outputs: 1) trench depth (R-2=0.985), 2) lateral trench etch (R-2=0.852), 3) trench sidewall angle (R-2=0.815), and 4) aspect ratio dependent etch (R-2=0.942), where R-2 represents the correlation between actual and model predicted values. The presented characterization models are employed to form beams as small as 300nm wide etched to a depth >15mum with near vertical sidewalls using standard photolithography equipment. In addition, the provided models are exploited to produce a dual re-entrant/tapered beam etch release process. Released silicon beam are demonstrated over 1200mum long and 30mum thick with a base width of 300nm.