The fabrication and characterization of EEPROM arrays on glass using a low-temperature poly-Si TFT process

被引:46
作者
Young, ND
Harkin, G
Bunn, RM
McCulloch, DJ
French, DJ
机构
[1] Philip Research Lab, Surrey
关键词
D O I
10.1109/16.543029
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The fabrication and optimization of poly-Si thin-film transistors and memory devices on glass substrates at temperatures of 200 degrees C-400 degrees C is described, and the device characteristics and stability are discussed, The devices were formed using PECVD amorphous silicon, silicon dioxide, and silicon nitride films, and the crystallization of the amorphous silicon was achieved with an excimer laser, The performance of 16 x 16 EEPROM arrays with integrated drive circuits formed using this technology is presented.
引用
收藏
页码:1930 / 1936
页数:7
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