The D30V/MPEG multimedia processor

被引：10

作者：

Takata, H ^{[1
]}

Watanabe, T ^{[1
]}

Nakajima, T ^{[1
]}

Takagaki, T ^{[1
]}

Sato, H ^{[1
]}

Mohri, A ^{[1
]}

Yamada, A ^{[1
]}

Kanamoto, T ^{[1
]}

Matsuda, Y ^{[1
]}

Iwade, S ^{[1
]}

Horiba, Y ^{[1
]}

机构：

[1] Mitsubishi Elect Corp, Syst LSI Design R&D Dept, Syst LSI Dev Ctr, Itami, Hyogo 6648641, Japan

来源：

IEEE MICRO | 1999年 / 19卷 / 04期

关键词：

D O I：

10.1109/40.782566

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

THIS PROCESSOR INTEGRATES A DUAL-ISSUE RISC WITH MINIMAL HARDWARE SUPPORT TO IMPLEMENT A REAL-TIME MPEG-2 DECODER. ITS SMALL CHIP AREA AND EASY PROGRAMMING ARE ADVANTAGEOUS FOR MULTIMEDIA APPLICATIONS.

引用

页码：38 / 47

页数：10

共 7 条

[1]

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[2]

*INT ORG STAND, 1994, ISOIECJTC1 INT ORG 2

[3]

MIZUNO M, 1997, ISSCC, P256

[4]

MOHRI A, 1998, P 24 EUR SOL STAT CI, P180

[5]

TAKADA H, 1997, P 24 S HET CHEM SEND, P124

[6] Real-time MPEG2 encoding and decoding with a dual-issue RISC processor [J].

Yamada, A ;

Yoshida, T ;

Holmann, E ;

Matsumura, T ;

Uramoto, S .

PROCEEDINGS OF THE IEEE 1997 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1997, :225-228

[7]

YOSHIDA T, 1997, ISSCC, P266

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