Critical voltage transition logic: An ultrafast CMOS logic family

We present a new kind of CMOS logic circuit that has a different structure and different operation mechanism compared to the existing logic circuits. fts unique delay propagation characteristic makes it much faster than the conventional CMOS logic gate. Gale outputs are preconditioned to a voltage level between V-dd and V-ss, using a new clocking scheme and circuit design. We give a buffer design example which is about 6.5 times faster than the conventional buffer: The total energy consumed by the new circuit structure is slightly more than conventional CMOS domino logic; however, the energy-delay product is smaller.