Improved digital current control methods in switched reluctance motor drives

被引：94

作者：

Blaabjerg, F ^{[1
]}

Kjaer, PC

Rasmussen, PO

Cossar, C

机构：

[1] Univ Aalborg, Inst Energy Technol, DK-9220 Aalborg, Denmark

[2] ABB Corp Res, Dept Power Engn, Vasteraas, Sweden

[3] Univ Glasgow, Dept Elect & Elect Engn, SPEED Lab, Glasgow G12 8QQ, Lanark, Scotland

来源：

IEEE TRANSACTIONS ON POWER ELECTRONICS | 1999年 / 14卷 / 03期

关键词：

control; FPGA; noise-free sampling; switched reluctance drives;

D O I：

10.1109/63.761700

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a method to avoid current feedback filters in fast digital-based current loops in switched reluctance drives. Symmetrical pulsewidth modulation (PWM) and synchronized sampling of the phase current allow a noise-free current sampling with no antialiasing filter. This paper also proposes more efficient methods to chop the two transistors in the asymmetric inverter used with switched reluctance drives. A fast field-programmable gate array (FPGA)-based test system is used for validation of the new methods. Test results show a significant improvement in dynamic and steady-state current loop control compared with traditional methods. The new chopping method is found to reduce the switching losses and increase the drive efficiency.

引用

页码：563 / 572

页数：10