Development of an assembly process and reliability investigations for flip-chip LEDs using the AuSn soldering

被引:61
作者
Elger, G
Hutter, M
Oppermann, H
Aschenbrenner, R
Reichl, H
Jäger, E
机构
[1] Fraunhofer IZM, D-13355 Berlin, Germany
[2] EPIGAP Optoelekt GmbH, D-12255 Berlin, Germany
关键词
Silicon; Silicon Substrate; Assembly Process; Intermetallic Phasis; Substrate Wafer;
D O I
10.1007/s005420100103
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A packaging process for flip-chip LEDs (light emitting diodes) is described. The LEDs are picked and placed on a silicon substrate wafer. After reflow the substrates are individualized. AuSn solder is used for the interconnection. The solder compounds, Au and Sn, are electroplated separately: Sn on the silicon substrate and Au on the chip. The interconnections formed by tin-rich and by gold-rich intermetallic phases are compared. The metallurgy and the reliability of the LEDs are investigated. The superiority of the gold-rich interconnection is demonstrated.
引用
收藏
页码:239 / 243
页数:5
相关论文
共 7 条
[1]  
KALLMAYER C, 1995, 7 ITAP SAN JOS, P225
[2]  
MATIJASEVIC GS, 1991, THESIS U CALIFORNIA
[3]  
OKAMOTO H, 1987, AU SN GOLD TIN SYSTE
[4]  
Reichl H., 1995, FLIP CHIP TECHNOLOGI, P415
[5]  
Weiss S, 1997, ELEC COMP C, P780, DOI 10.1109/ECTC.1997.606259
[6]  
ZAKEL E, 1992, GOLD TIN BUMPS TAB I, V12, P27
[7]  
ZAKEL E, 1994, THESIS TU BERLIN