19.2mW 2Gbps CMOS pulse receiver for 60GHz band wireless communication

被引：18

作者：

Oncu, Ahmet ^{[1
]}

Fujishima, Minoru ^{[1
]}

机构：

[1] Univ Tokyo, Sch Frontier Sci, Kashiwa, Chiba, Japan

来源：

2008 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2008年

关键词：

CMOS; low power; 60GHz; pulse receiver;

D O I：

10.1109/VLSIC.2008.4585989

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A low-power 60GHz pulse receiver has been fabricated for over-Gbps wireless communication by a standard 90nm CMOS process. The receiver consists of a nonlinear detecting amplifier, a limiting amplifier, ail offset canceller and a buffer. The measured sensitivity is the average power of -20dBm for millimeter-wave pulses of 60GHz. The power dissipation and maximum data rate of the receiver arc 19.2mW and 2Gbps, respectively. These results indicate the possibility of new low-power and ultrahigh-speed wireless communication using millimeter-wave Pulses with CMOS implementation.

引用

页码：158 / 159

页数：2