A New Interface Technique for the Acquisition of Multiple Multi-Channel High Speed ADCs

被引:8
作者
Calvet, Denis [1 ]
机构
[1] Commissariat Energie Atom, Inst Rech Fondamentales Univers, F-91191 Gif Sur Yvette, France
关键词
Field programmable gate arrays; high speed analog to digital converters; source synchronous interfaces;
D O I
10.1109/TNS.2008.2002080
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Multi-channel high speed ADCs with a serial output interface operating at several hundred Mbps have been introduced several years ago. Interfacing to these high speed devices poses new challenges to the designer. Existing techniques usually rely on delay locked loops, require several milliseconds to reach stable operation, and do not guarantee a fixed latency making the accurate synchronization of several multi-channel ADCs difficult to achieve. A new interface technique is introduced to overcome these limitations. We detail the proposed method and show an implementation where a single field programmable gate array is used to collect data from twenty four 12-bit ADC channels clocked at 20 MHz.
引用
收藏
页码:2592 / 2597
页数:6
相关论文
共 10 条
[1]  
*AN DEV, 2007, AD9287 QUAD 8 BIT 10
[2]  
*AN DEV, 2005, AD9229 QUAD 12 BIT 5
[3]  
BARON P, 2007, P NUCL SCI S, V3, P1865
[4]  
DEFOSSEZ M, 2004, XAPP774 XIL INC
[5]  
DUTTA G, 2005, 104 SBOA TEX INSTR I
[6]  
ETO E, 2004, XAPP609 XIL INC
[7]  
GEORGE M, 2004, XAPP701 XIL INC
[8]  
*NAT SEM, 2008, ADC12EU050 ULTR POW
[9]  
*TX INSTR, 2005, ADS5273 8 CHANN 12 B
[10]   The T2K program [J].
Yamada, Y .
NUCLEAR PHYSICS B-PROCEEDINGS SUPPLEMENTS, 2006, 155 :28-32