Realizability conditions and bounds on synthesis of switched-capacitor DC-DC voltage multiplier circuits

被引：109

作者：

Makowski, MS

机构：

[1] Department of Electronics, Technical University of Gdansk

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS | 1997年 / 44卷 / 08期

关键词：

D O I：

10.1109/81.611263

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A formal study of the theoretical performance of switched-capacitor (SC) de-de voltage multiplier circuits is given, A question concerning the necessary number of circuit elements to realize a given conversion ratio is addressed, In response to the question the bound on attainable voltage ratio for a given number of capacitors k and the bound on the number of switches required in any circuit configuration have been established, The maximum step-up or step-down ratio is given by the kth Fibonacci number, while the bound on the number of switches required in any SC circuit is 3k - 2. The complete set of attainable de conversion ratios is found, A canonical circuit realization of the maximum voltage ratio is discussed and illustrative examples are included, Necessary and sufficient conditions for the realizability of a de conversion ratio are determined and formal proofs are given.

引用

页码：684 / 691

页数：8

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