A fault-tolerance strategy for an FPGA-based multi-stage interconnection network in a multi-sensor system for space application

Space research requires increasingly huge amount of scientific data. Next generation satellites will have on-board supercomputing capabilities to perform efficient information processing and overcome the possible limit imposed by communication bandwidth to ground receiving stations. They will also have to survive to even longer term mission, with respect to nowadays systems, thus reliability and fault tolerance will be a major concern, to cope with radiation induced faults, Flexibility also emerges as a desirable requisite for on-board processing system to implement new functionalities and run different algorithms for the ongoing mission. The trend is toward multiprocessor architecture in which processing nodes and memories are connected through high bandwidth interconnection networks. The paper presents a fault-tolerance strategy for an FPGA implementation of a redundant multistage interconnection network (MIN), for a space multi-sensor system. The implemented mechanism is endowed with careful fault diagnosis ability, which allows to exploit MIN intrinsic reconfiguration capabilities, as well as the reprogrammability of SRAM-based FPGAs.