Chaotic multi-objective optimization based design of fractional order PIλDμ controller in AVR system

被引：147

作者：

Pan, Indranil ^{[1
,2
]}

Das, Saptarshi ^{[2
]}

机构：

[1] Indian Inst Technol Delhi, Ctr Energy Studies, New Delhi 110016, India

[2] Jadavpur Univ, Dept Power Engn, Kolkata 700098, India

来源：

INTERNATIONAL JOURNAL OF ELECTRICAL POWER & ENERGY SYSTEMS | 2012年 / 43卷 / 01期

关键词：

Automatic voltage regulator (AVR); Chaotic non-dominated sorting genetic algorithm; Fractional order PID controller; Multi-objective optimization; COORDINATED DESIGN; OPTIMUM DESIGN; NSGA-II; PERFORMANCE; ALGORITHM;

D O I：

10.1016/j.ijepes.2012.06.034

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a fractional order (FO) (PID mu)-D-lambda controller is designed to take care of various contradictory objective functions for an automatic voltage regulator (AVR) system. An improved evolutionary non-dominated sorting genetic algorithm II (NSGA II), which is augmented with a chaotic map for greater effectiveness, is used for the multi-objective optimization problem. The Pareto fronts showing the trade-off between different design criteria are obtained for the (PID mu)-D-lambda and PID controller. A comparative analysis is done with respect to the standard PID controller to demonstrate the merits and demerits of the fractional order (PID mu)-D-lambda controller. (C) 2012 Elsevier Ltd. All rights reserved.

引用

页码：393 / 407

页数：15

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