HELP: A Hardware-Embedded Delay PUF

A novel Physical Unclonable Functions (PUF) design called HELP that utilizes the existing path delays of a design to generate a random and stable bitstring of desired length with minimal area and performance overhead is studied. The challenge component for HELP consists of a randomly selected, two-vector test sequence applied to the inputs of the macro-under-test (MUT), which introduces a set of transitions that propagate through the core logic of the MUT and emerge on its outputs. An embedded test structure called REBEL was used to obtain a high-precision, digitized representation of the path delays. The second row is the capture row, and is configured in a mixed mode, in which a specific FF, called the insertion point (IP), is chosen. The clock generator module generates two clock signals: a Launch clock and a Capture clock. On average, the number of valid paths tested per second is 30.20 for enrollment and 88.03 for regeneration. This includes the time required to test and discard invalid paths, and the time required to generate the bitstrings from the n PNs stored in block RAM.