0.18-mu m fully-depleted silicon-on-insulator MOSFET's

被引：18

作者：

Cao, M ^{[1
]}

Kamins, T ^{[1
]}

VandeVoorde, P ^{[1
]}

Diaz, C ^{[1
]}

Greene, W ^{[1
]}

机构：

[1] HEWLETT PACKARD LABS,QUANTUM STRUCT RES INITIAT,PALO ALTO,CA 94304

来源：

IEEE ELECTRON DEVICE LETTERS | 1997年 / 18卷 / 06期

关键词：

D O I：

10.1109/55.585344

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

High-performance 0.18-mu m gate-length fully-depleted silicon-on-insulator (FD-SOI) MOSFET's were fabricated using 4-nm gate oxide, 35-nm thick channel, and 80-nm or 150-nm buried oxide layer, An elevated source/drain structure was used to provide extra silicon during silicide formation, resulting in low source/drain series resistance, Nominal device drive currents of 560 mu A/mu m and 340 mu A/mu m were achieved for n-channel and p-channel devices, respectively, at a supply voltage of 1.8 V. Improved short-channel performance and reduced self-heating were observed for devices with thinner buried oxide layers.

引用

页码：251 / 253

页数：3