A generalized HSPICE™ macro-model for pinned spin-dependent-tunneling devices

被引：16

作者：

Das, B ^{[1
]}

Black, WC ^{[1
]}

机构：

[1] Iowa State Univ Sci & Technol, Dept Elect & Comp Engn, Ames, IA 50011 USA

来源：

IEEE TRANSACTIONS ON MAGNETICS | 1999年 / 35卷 / 05期

关键词：

circuit macro-model; MRAM; HSPICE; pinned SDT; Piece-Wise-Linear (PWL);

D O I：

10.1109/20.801015

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work presents the first generalized circuit macro-model for a pinned Spin-Dependent-Tunneling (SDT) device. The macro-model is realized as a four terminal subcircuit which emulates SDT device behavior over a wide range of sense and word line currents. This model accurately represents the nonlinear and hysteretic nature of an SDT device and HSPICE(TM) simulations of memory circuits using this model show expected outcomes. The model is flexible and relatively simple: ranges of the write /read currents and device resistance values are incorporated as parameterized variables and no semiconductor devices are used within the model.

引用

页码：2889 / 2891

页数：3