A 4-mW monolithic CMOS LNA at 5.7 GHz with the gate resistance used for input matching

被引：39

作者：

Asgaran, S ^{[1
]}

Deen, J ^{[1
]}

Chen, CH ^{[1
]}

机构：

[1] McMaster Univ, Dept Elect & Comp Engn, Hamilton, ON L8N 3Z5, Canada

来源：

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | 2006年 / 16卷 / 04期

基金：

加拿大自然科学与工程研究理事会;

关键词：

CMOS; effective transconductance; inductive degeneration; input matching; low-noise amplifier;

D O I：

10.1109/LMWC.2006.872128

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Design and measured results of a fully integrated 5.7-GHz CMOS low-noise amplifier (LNA) is presented. To design this LNA, the parasitic input resistance of a metal-oxide-semiconductor field-effect transistor (MOSFET) is converted to 50 Omega by a simple L-C network, hence eliminating the need for source degeneration. It is shown, by means of compact expressions, that this matching method enhances the effective transconductance of the LNA by a factor that is inversely proportional to a MOSFET's input resistance. The effect of our proposed method on the noise figure (NF) of the LNA is also discussed. With an 11.45-dB power gain and a 3.4-dB NF at 4 mW of dc power, the presented LNA achieves the best overall performance when compared with the most recently published LNAs.

引用

页码：188 / 190

页数：3

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