Low-Power Impulse UWB Architectures and Circuits

被引:49
作者
Chandrakasan, Anantha P. [1 ]
Lee, Fred S. [2 ]
Wentzloff, David D. [3 ]
Sze, Vivienne [1 ]
Ginsburg, Brian P. [4 ]
Mercier, Patrick P. [1 ]
Daly, Denis C. [1 ]
Blazquez, Raul [5 ]
机构
[1] MIT, Dept Elect Engn & Comp Sci, Cambridge, MA 02139 USA
[2] SiTime, Sunnyvale, CA 94085 USA
[3] Univ Michigan, Ann Arbor, MI 48109 USA
[4] Texas Instruments Inc, Dallas, TX 75266 USA
[5] Texas Instruments Inc, Germantown, MD 20874 USA
基金
美国国家科学基金会; 加拿大自然科学与工程研究理事会;
关键词
Analog-digital conversion; circuits; communication systems; digital communication; digital integrated circuits; integrated circuits; radio communication; receivers; transmitters; TRANSCEIVER ARCHITECTURE; BASEBAND PROCESSOR; CMOS;
D O I
10.1109/JPROC.2008.2008787
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Ultra-wide-band (UWB) communication has a variety of applications ranging from wireless USB to radio-frequency (RF) identification tags. For many of these applications, energy is critical due to the fact that the radios are situated on battery-operated or even batteryless devices. Two custom low-power impulse UWB systems are presented in this paper that address high- and low-data-rate applications. Both systems utilize energy-efficient architectures and circuits. The high-rate system leverages parallelism to enable the use of energy-efficient architectures and aggressive voltage scaling down to 0.4 V while maintaining a rate of 100 Mb/s. The low-rate system has an all digital transmitter architecture, 0.65 and 0.5 V radio-frequency (RF) and analog circuits in the receiver, and no RF local oscillators, allowing the chipset to power on in 2 ns for highly duty-cycled operation.
引用
收藏
页码:332 / 352
页数:21
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