Impact of strained-silicon-on-insulator (sSOI) substrate on FinFET mobility

被引：51

作者：

Xiong, W. ^{[1
]}

Cleavelin, C. Rinn

Kohli, P.

Huffman, C.

Schulz, T.

Schruefer, K.

Gebara, G.

Mathews, K.

Patruno, P.

Le Vaillant, Yves-Matthieu

Cayrefourcq, I.

Kennard, M.

Mazure, C.

Shin, K.

Liu, T. -J. King

机构：

[1] Texas Instruments Inc, SiTD, Dallas, TX 75806 USA

[2] Infineon Technol, D-91739 Munich, Germany

[3] ATDF Inc, Austin, TX 78701 USA

[4] SOITEC, F-38190 Bernin, France

[5] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA

[6] Synopsys Inc, Mountain View, CA 94043 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2006年 / 27卷 / 07期

关键词：

finFET; insulated gate FETs; MOS devices; silicon-on-insulator (SOI) technology; strained-silicon;

D O I：

10.1109/LED.2006.877714

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this letter, it is shown that for fin widths down to < 20 nm, strain can be retained in patterned strained-silicon-on-insulator (sSOI) films and is correlated to mobility enhancements observed in FinFET devices. NMOS FinFET mobility is improved by 60% and 30% for (110)/< 110 > and (100)/< 100 > fin surface/direction, respectively. Although PMOS FinFET mobility is degraded by 35% for (110)/< 110 > fins, it is enhanced by up to 30% for (100)/< 100 > fins. These results can be qualitatively explained using the bulk-Si piezoresistance coefficients.

引用

页码：612 / 614

页数：3

共 15 条

[1]

CAYREFOURCQ I, 2005, P ECS SIL INS TECH D, V12, P191

[2]

Choi YK, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P259, DOI 10.1109/IEDM.2002.1175827

[3] Band offset induced threshold variation in strained-Si nMOSFETs [J].

Goo, JS ;

Xiang, Q ;

Takamura, Y ;

Arasnia, F ;

Paton, EN ;

Besser, P ;

Pan, J ;

Lin, MR .

IEEE ELECTRON DEVICE LETTERS, 2003, 24 (09) :568-570

[4]

Hisamoto D, 2000, IEEE T ELECTRON DEV, V47, P2320, DOI 10.1109/16.887014

[5]

Hisamoto D., 1989, International Electron Devices Meeting 1989. Technical Digest (Cat. No.89CH2637-7), P833, DOI 10.1109/IEDM.1989.74182

[6]

KEDZIERSKI J, 2001, IEDM DEC

[7] NONLINEAR PIEZORESISTANCE EFFECTS IN SILICON [J].

MATSUDA, K ;

SUZUKI, K ;

YAMAMURA, K ;

KANDA, Y .

JOURNAL OF APPLIED PHYSICS, 1993, 73 (04) :1838-1847

[8]

MIZUNO T, 2003, IEDM DEC

[9]

Nouri F, 2004, IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST, P1055

[10] Pi-gate SOI MOSFET [J].

Park, JT ;

Colinge, JP ;

Diaz, CH .

IEEE ELECTRON DEVICE LETTERS, 2001, 22 (08) :405-406

← 1 2 →