Bit-selective read and write with coincident current scheme in spin-valve/diode MRAM cells

被引：7

作者：

Boeve, H ^{[1
]}

Das, J ^{[1
]}

Bruynseraede, C ^{[1
]}

De Boeck, J ^{[1
]}

Borghs, G ^{[1
]}

机构：

[1] IMEC VZW, Louvain, Belgium

来源：

ELECTRONICS LETTERS | 1998年 / 34卷 / 18期

关键词：

D O I：

10.1049/el:19981250

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An array of magnetic memory cells, each consisting of a spin-valve structure in series with a GaAs diode, is demonstrated. Bit-addressability in the matrix, based on a DRAM-like floor plan, is proved for both write and read operations using a coincident current scheme. By implementing a series diode in the memory cell, read signals up to 10mV were measured.

引用

收藏

页码：1754 / 1755

页数：2

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