A single-chip 2.4-GHz direct-conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique

被引:37
作者
Lee, K [1 ]
Park, J
Lee, JW
Lee, SW
Huh, HK
Jeong, DK
Kim, W
机构
[1] Global Commun Technol, Santa Clara, CA 95051 USA
[2] Seoul Natl Univ, Sch Elect Engn, Seoul 151742, South Korea
关键词
wireless local loop; direct conversion; phase-locked loop; mixer; fractional-N frequency synthesizer; q(m) - C filter;
D O I
10.1109/4.918918
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A single-chip direct-conversion CMOS receiver for 2.4-GHz wide-band code-division multiple-access wireless local loop (WLL) is described, The chip includes a low noise amplifier, a 12-phase downconverter, a variable gain amplifier, a g(m) - C channel selection filter, a programmable phase-locked loop for seven channel frequencies, and a 4-bit flash analog-to-digital converter. The proposed multiphase reduced frequency conversion scheme combined with a multiphase sampling fractional-N prescaler, a cascaded de-offset canceler and distributed automatic gain control loops offers solutions to problems of a direct-conversion receiver, Experimental results show -115-dBm sensitivity, 4.4-dB noise figure, and 95-dB dynamic range, which sufficiently meet commercial WLL specification.
引用
收藏
页码:800 / 809
页数:10
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