Extremely low-noise performance of GaAs MESFET's with wide-head T-shaped gate

被引:21
作者
Onodera, K [1 ]
Nishimura, K
Aoyama, S
Sugitani, S
Yamane, Y
Hirano, M
机构
[1] NTT, Opt Network Syst Labs, Kanagawa 2390847, Japan
[2] NTT, Syst Elect Labs, Atsugi, Kanagawa 24301, Japan
关键词
GaAs; gate resistance; MESFET; noise performance; semiconductor device fabrication;
D O I
10.1109/16.740895
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Fully ion-implanted low-noise GaAs MESFET's with a 0.11-mu m Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeterwave integrated circuits (MMIC's). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (L-h) and the device performance is examined, The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (f(T)) and a maximum stable gain (MSG) decrease monotonously as L-h increases on account of parasitic capacitance, However, the device with L-h of 1.0 mu m, which has lower gate resistance than 1.0 Omega, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz, The measured noise figure is comparable to that of GaAs-based HEMT's.
引用
收藏
页码:310 / 319
页数:10
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